In 1970, Invoice Harding envisioned a totally automated wafer-fabrication line that will produce built-in circuits in lower than in the future. Not solely was such a purpose gutsy 54 years in the past, it will be daring even in as we speak’s billion-dollar fabs, the place the fabrication time of a complicated IC is measured in weeks, not days. Again then, ICs, similar to random-access reminiscence chips, had been usually produced in a monthlong stop-and-go march by means of dozens of handbook work stations.
On the time, Harding was the supervisor of IBM’s Manufacturing Analysis group, in
East Fishkill, N.Y. The mission he would result in make his imaginative and prescient a actuality, all however unknown as we speak, was referred to as Challenge SWIFT. To realize such an amazingly quick turnaround time required a stage of automation that would solely be completed by a paradigm shift within the design of integrated-circuit manufacturing strains. Harding and his staff completed it, attaining advances that will finally be mirrored all through the worldwide semiconductor trade. Lots of SWIFT’s groundbreaking improvements are actually commonplace in as we speak’s extremely automated chip fabrication crops, however SWIFT’s extremely quick turnaround time has by no means been equaled.
SWIFT averaged 5 hours to finish every layer of its fabrication course of, whereas the quickest trendy fabs take 19 hours per processing layer, and the trade common is 36 hours. Though as we speak’s built-in circuits are constructed with many extra layers, on bigger wafers the dimensions of small pizzas, and the processing is extra advanced, these elements don’t altogether shut the hole. Harding’s automated manufacturing line was actually, really, swift.
A Semiconductor Manufacturing Manifesto
I encountered Harding for the primary time in 1962, and hoped it will be the final.
IBM was gearing as much as produce its first utterly solid-state pc, the System/360. It was a considerably rocky encounter. “What the hell good is that?” he bellowed at me as I demonstrated how tiny, unpackaged semiconductor cube could possibly be routinely dealt with in bulk for testing and sorting.
Creator Jesse Aronstein [at far right, in top photo] took a break from managing the gear group of Challenge SWIFT to play French horn one night per week with the Southern Dutchess Pops Orchestra. One other key supervisor, Walter J. “Wally” Kleinfelder [bottom left], standing at proper, headed the method group of Challenge SWIFT. William E. “Invoice” Harding [bottom right], seen right here in 1973, was a brusque WW II fight veteran and artistic innovator. He conceived and directed IBM’s Challenge SWIFT, which succeeded in fabricating built-in circuits in in the future.Clockwise from prime: IBM/Laptop Historical past Museum; IBM (2)
William E. (“Invoice”) Harding was an modern thinker and inventor. He had been creating semiconductors and their manufacturing know-how at IBM for 3 years when the corporate’s new Parts Division was shaped in 1961. Harding grew to become a midlevel supervisor within the new division, accountable for creating and producing the gear required to fabricate the System/360’s solid-state gadgets and circuit modules.
He was tough across the edges for an IBM supervisor. However maybe it was to be anticipated of somebody who had grown up in Brooklyn, N.Y., and was wounded 3 times in fight in World Warfare II whereas serving in Common George S. Patton’s Third Military. After the warfare, Harding earned bachelor’s and grasp’s levels in arithmetic and physics and have become a member of IEEE.
I joined IBM in 1961, coming from rocket-engine improvement at Common Electrical. Like most engineers on the time, I knew nothing about semiconductor manufacturing. 5 years prior, I had attended a vacuum-tube electronics course during which the professor described the transistor as “a laboratory curiosity, which can or might not ever quantity to something.”
Challenge SWIFT occupied a small house, proven right here in yellow, in constructing 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM
Harding’s tough and crude method surfaced each time I crossed paths with him. If he ever went to IBM
“attraction college” (administration coaching), there was no discernible proof of it. However, he succeeded in his mission. By 1964, solid-state logic modules for System/360s had been flowing from the Parts Division’s new facility on a former farm in East Fishkill.
In July 1970, I returned to IBM after three years of graduate research. I used to be a first-level supervisor for 4 years previous to that academic break, and didn’t need one other administration job. I wished a purely technical profession, and I joined East Fishkill’s Manufacturing Analysis (MR) group hoping to get one.
Harding and I then crossed paths once more. In mid-August of 1970, he grew to become MR’s prime supervisor. Previous to that, he spent a yr creating an IBM company technique for the longer term manufacturing and use of
very-large-scale built-in (VLSI) circuits. He was given command of MR to show the viability of his manufacturing ideas.
An meeting of MR personnel was convened to announce the administration change. After being launched, Harding described his view of future VLSI functions and manufacturing. These had been his key factors:
- VLSI circuits could be primarily based on field-effect transistor know-how (on the time, bipolar-junction transistors had been dominant);
- Defect-free excessive yields could be paramount;
- Manufacturing could be absolutely automated;
- Finest outcomes would accrue from processing one wafer at a time;
- Brief turnaround instances would confer essential advantages;
- Quantity would scale up by replicating profitable manufacturing strains.
After the academic lecture, Harding modified from professor to commander, Common Patton–fashion. MR’s sole mission was to show Harding’s concepts, and ongoing tasks not aligned with that purpose could be transferred elsewhere inside IBM or deserted. MR would show that an automatic system could possibly be constructed to course of about 100 wafers a day, one after the other, with excessive yield and a one-day turnaround time.
What? Did I hear that proper? One-day turnaround from naked wafer to completed circuits was what we might now name a moon shot. Keep in mind, on the time, it usually took greater than a month. Did he actually imply it?
Harding knew that it was theoretically doable, and he was decided to attain it. He declared that IBM would have a considerable aggressive benefit if prototype experimental IC designs could possibly be produced in a day, as a substitute of months. He wished the circuit designer to have testable circuits the day after submitting the digital description to the manufacturing line.
One-day turnaround from naked wafer to completed circuits was what we might now name a moon shot.
Harding instantly organized an gear group and a course of group inside MR, naming me to handle the gear group. I didn’t need to be a supervisor once more. Now, reluctantly, I used to be a second-level supervisor, accountable for creating all of the processing and wafer-handling gear for a yet-to-be-defined manufacturing line that I had barely began to visualise. My dream analysis job had lasted little greater than a month.
Walter J. (“Wally”) Kleinfelder transferred into MR to handle the method group. They would choose the product to fabricate and outline the method by which it will be made—the detailed sequence of chemical, thermal, and lithographic steps required to take a clean silicon wafer and construct built-in circuits on its floor at excessive yield.
Kleinfelder chosen a random-access reminiscence chip, the IBM RAM II, for our demonstration. This product was being produced on-site at East Fishkill, so we might have all the pieces we wanted to construct it and consider our outcomes relative to these of the prevailing nonautomated manufacturing line.
IBM’s SWIFT Pilot Wafer Fab Had a Monorail “Taxi”
Built-in-circuit manufacturing entails first creating the transistors and different elements of their correct locations on the silicon wafer floor, after which wiring them collectively by including a skinny movie of aluminum selectively etched to create the required wiring sample. That skinny movie of conductor is named the wiring, or metallization, layer.
IC manufacturing makes use of
photolithography to create the numerous layers, every with a particular sample, wanted to manufacture an IC. These embody the steel wiring layers, of which there will be greater than a dozen for a complicated chip as we speak. For these steps, the steel layer on the wafer is coated with a light-sensitive photoresist materials, after which a picture of the sample is uncovered on to it. The areas the place conductors shall be shaped are blocked from the sunshine. When the picture is developed, the resist is faraway from the sample areas that had been uncovered, enabling these areas to be etched by an acid. The remainder of the floor stays protected by the acid-proof resist. After etching is accomplished, the remaining protecting resist is eliminated, leaving simply the wiring layer within the required sample.
The IC course of additionally makes use of lithography to create transistors and different elements on the silicon wafer. Right here, openings are etched in insulating layers by means of which tiny quantities of particular impurities will be infused into the uncovered spots of pure silicon to alter {the electrical} properties. Producing the RAM-II ICs required 4 separate lithographic operations utilizing 4 completely different patterns: three for creating the transistors and different elements, and one to create the steel wiring layer. The 4 patterns needed to be precisely aligned with each other to efficiently create the chips.
Lithography is barely a part of the IC manufacturing course of, nevertheless. Within the present manufacturing line, it took many weeks to course of a RAM-II wafer. However the uncooked course of time—the time a wafer spent truly being labored on at varied thermal, lithographic, chemical, and deposition stations—was lower than 48 hours. Most of a wafer’s time was spent ready to bear the following course of step. And a few steps, chemical cleansing specifically, could possibly be eradicated if wafers progressed shortly from one step to the following.
It was the accountability of Kleinfelder’s group to find out which steps could possibly be eradicated and which could possibly be accelerated. The ensuing uncooked course of time was lower than 15 hours. It then fell to
Maung Htoo, my supervisor of chemical-equipment improvement, to check the proposed course of. His individuals hustled 1.25-inch-diameter wafers by means of a “pots and pans” lab setup to judge and refine it. The abbreviated process efficiently produced working circuits in about 15 hours, as anticipated.
The structure of an automatic system materialized. It was initially envisioned as a sequence of linked machines, every performing one step of the method, like an car meeting line. However gear downtime for preventative upkeep and restore of breakdowns needed to be accommodated. This was achieved by the insertion of short-term storage “buffers” that will quickly retailer wafers at chosen factors within the course of chain when needed.
This course of chain idea was additional disrupted by issues associated to lithographic-pattern imaging. Publicity of the photoresist on wafers was generally completed on the time by a course of analogous to photographic contact printing. The lithographic masks, by means of which gentle shone when exposing the photoresist, was the equal of a photographic detrimental. Any defect or particle on the masks would end in a corresponding defect on a chip, on the identical location, wafer after wafer.
The East Fishkill lithography group had developed a noncontact 10:1 discount
step-and-repeat picture projector. Consider it as a kind of photographic slide projector that produced a shrunken picture containing the sample for a single layer on a chip. It then “stepped” throughout the wafer, exposing one chip location at a time. Relative to contact masking, the stepper promised decrease sensitivity to particulate contamination, as a result of the dimensions of the shadow of any stray particle could be decreased by 10:1. Different benefits included greater optical decision and longer masks life.
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As a result of it was sluggish, although, a number of steppers could be wanted to satisfy the throughput goal. Reaching the perfect sample alignment on every wafer for a number of sample exposures required {that a} wafer be routed again to the identical stepper for publicity of every layer within the course of chain. That might cancel the impact of picture distortions launched by slight variations from one machine to a different. Constructing the RAM-II circuits then required {that a} wafer make 4 separate journeys to its assigned stepper. That divided the linear sequence into 5 sectors. A monorail “taxi” would take a wafer from one processing sector to its assigned stepper, and return later to take it to its subsequent sector.
Every of the 5 sectors was envisioned to be an enclosure containing all the automated wafer-processing and dealing with gear required to perform that section of the method chain. The sector enclosures and the taxi could be designed to supply a clean-room-quality native surroundings for the wafers. Inside a sector enclosure, usually, a wafer would go straight from a wet-chemistry module to miniature furnaces to a photoresist software module, and, lastly, to the taxi pickup port. Contained in the wet-chemistry module, for instance, the wafer would bear cleansing, improvement of the photoresist and its elimination, and etching, amongst different procedures.
Management of the complete line was to be completed at three ranges. General production-line administration, recordkeeping, taxi logistics, and course of monitoring could be dealt with by a central computer-based system. Devoted controllers, one for every sector, would handle wafer logistics throughout the sector and feed wafer visitors and processing information to the central system. The person processing and wafer-handling modules inside every sector enclosure would have their very own specialised controls, as wanted, for impartial setup and upkeep.
Lastly configured, our automated demonstration line for the RAM-II chips would consist of 5 sectors, a taxi, and a lithographic-pattern imaging middle, all managed by pc. Six months after Harding took command, MR began to design and construct the precise system.
The Brash Center Supervisor Discovered Inspiration in Literature
Harding made frequent journeys to
IBM’s headquarters, in Armonk, N.Y., to report progress, request sources, rebut challenges, and persuade the highest brass that the cash being spent was funding sooner or later. It was a troublesome mission. His prolonged weekly workers conferences usually mirrored the strain he was beneath. He lectured at size on issues he knew we knew, instructed allegorical tales, and spun analogies.
On the time, I didn’t understand that he was utilizing his workers conferences to develop and refine concepts for the shows at Armonk. He was noting our reactions and adjusting his presentation concepts accordingly. His shows to the highest brass had been efficient. All through the mission, spanning about three years, MR had all of the funding and assist it wanted to develop, design, construct, and function the complete system.
At one workers assembly, Harding learn aloud Heywood Broun’s quick story “
The 51st Dragon,” to emphasise the facility of a reputation or slogan to inspire individuals to attain the unimaginable. His level, after all, was that we wanted a extremely good title for the mission. “SWIFT” was finally chosen. Harding at all times insisted that it was not an acronym, however nonetheless individuals figured it was shorthand for “Semiconductor Wafer Built-in Manufacturing unit Know-how.”
SWIFT’s extremely quick turnaround time has by no means been equaled.
SWIFT’s processing and wafer-handling gear was customized totally inside IBM’s Parts Division. The first design goals had been to course of wafers routinely, constantly, and uniformly and maintain them clear and undamaged. Wafer-handling experiments sorted out the cleanest and gentlest methods. Dealing with gear was designed to assist the wafer fairly than grip it. A novel wafer handler that used a circulate of air above the wafer to elevate it, with out bodily contact, was efficiently integrated for a few of the wafer-transport strikes.
There was one exception to the “clear and delicate” design of SWIFT’s dealing with equipment. Administration on the Parts Division’s Burlington, Vt., website pressured Harding to make use of “air-track” wafer-transport gear that that they had developed. This gear used airflow to elevate and transfer wafers, very similar to a puck in a recreation of air hockey. Harding wanted Burlington’s continued assist, so he decreed that some air-track gear be utilized in SWIFT. And it was, although wafer-contamination and reliability questions had been unresolved.
One other top-down decree explains why SWIFT ended up with two various kinds of sector management techniques—the antithesis of excellent design for maintainability. A customized controller had been designed, and 5 models had been being constructed (one for every sector), when HQ required that we incorporate the newly introduced
IBM System/7, which had been developed particularly for factory-equipment and process-control functions. In any case, if IBM itself didn’t use the pc in its personal superior manufacturing line, potential clients would marvel “why not?” But when SWIFT used a System/7 and the mission proved to achieve success, it will assist promote System/7s. And so for the 5 sectors, SWIFT ended up with 4 customized controllers and one System/7. Each varieties labored effectively.
Gear reliability was SWIFT’s Achilles’ heel. To assist obtain excessive reliability and ease of upkeep, sure mechanisms and controls had been standardized to be used all through the system, and so they had been chosen for reliability and ease fairly than novelty or magnificence. For instance, an individual observing the system in operation would discover that many motions had been completed in discrete easy steps fairly than a single traverse. Underlying that peculiarity was the in depth use of the straightforward, sturdy, and dependable
Geneva drive, initially developed centuries in the past for clocks, however now tailored for linear and rotary motions that needed to be easy and exactly locked in on the finish factors. Every simply managed flip of the Geneva drive’s enter shaft made one step. Lengthy traverses required a number of turns of the shaft, ensuing within the odd-looking motions.
Inside a sector’s enclosed chamber, a wafer went by means of a sequence of totally automated processing steps. Two of the early idea sketches are represented right here. The wafers got here into the higher chamber with a sample uncovered onto the resist and underwent a sequence of processing steps that included improvement, hardening, etching, and others, as indicated.
One other simplification concerned spinning the wafers to centrifugally unfold liquid photoresist that was dropped onto the middle of the wafer. In present strains, “unsuitable spin velocity” was incessantly cited as the reason for resist-related wafer-processing rejects. Spin velocity was eradicated as a variable by driving SWIFT’s spinners with synchronous AC motors locked to three,600 rpm by their 60-hertz AC energy supply, simply as phonograph turntables are pushed. No velocity controllers could be required. The specified photoresist movie thickness could be achieved by adjusting the remaining variables—temperature, viscosity, and/or spin time. Ultimately, system reliability was improved by the elimination of 4 separate velocity controllers.
As SWIFT progressed from blue-sky idea to precise {hardware} implementation, Harding adjusted MR’s group and gained the cooperation of supporting teams. He noticed to it that his individuals had the sources to do the job and will give attention to the mission. I got here to admire his organizational expertise and his capacity to single out and recruit top-notch expertise from throughout the firm.
Harding established a gaggle to develop SWIFT’s grasp management system, which monitored the progress on every wafer because it moved by means of the sectors. This Execution Management System (ECS) was primarily based on an
IBM 1800. Every wafer had a serial quantity and was tracked at each step by means of the road. The ECS saved and monitored every wafer’s processing parameters, detecting and reacting shortly to out-of-spec conditions. Its punch playing cards and tape cartridges appear quaint by as we speak’s measure, nevertheless it was a serious advance in manufacturing management and monitoring for a wafer line.
He additionally transferred a complete instrumentation division, managed by Sam Campbell, from IBM Endicott to East Fishkill. Campbell’s division subsequently developed groundbreaking strategies for real-time, in-situ course of management for SWIFT.
A Brief Life however an Enduring Legacy in Semiconductor Manufacturing
Mockups of furnaces and chemical processors had been constructed and examined.
Robert J. Straub’s division in East Fishkill’s Manufacturing Engineering group designed and constructed the sectors and the processing gear modules inside them. Harding introduced in Bevan P.F. Wu to handle the set up, debugging, and operation of the road. As gear and services coalesced in SWIFT’s devoted 4,000-square-foot house, Rolf H. Brunner, who had managed portion of the sector designs together with improvement of the vacuum metal-deposition gear, took accountability beneath Wu for gear set up, startup, and debugging.
Just one operation in the complete course of was not absolutely automated. Alignment of the wafer for exposing the sample on the photoresist nonetheless relied on a well-trained operator. In its last kind, SWIFT had each a ten:1 optical stepper and in addition a 1:1 contact-mask machine, however because it occurred, a lot of the chips produced had been with the 1:1 machine, as a result of the throughput was greater that means.
By the top of 1973, IBM HQ was already satisfied that full automation of wafer processing may succeed. A lot in order that this purpose was adopted as a major goal for a brand new wafer-processing line to supply the circuits for IBM’s next-generation pc, the “FS” (
Future System). The proposed new line was dubbed “FMS” (Future Manufacturing System), and SWIFT was renamed “FMS Feasibility Line.”
Bevan Wu efficiently managed the road’s completion, check runs, personnel coaching, and refinements of kit, course of, and procedures. He introduced the road to the purpose of being certified to supply circuits for IBM merchandise. The system made 5 continuous-operation runs between mid-1974 and early 1975. Between runs, his group analyzed outcomes and applied enhancements. The longest steady run spanned 12 days. Wafer throughput averaged 58 wafers per day, 83 % of its designed most. Common turnaround time from bare-wafer enter to testable-circuits output was about 20 hours. The uncooked course of time was 14 hours. The yield in the end equaled the perfect ever achieved by East Fishkill’s typical RAM-II manufacturing line.
A complete of 135 technicians, engineers, and managers from IBM places worldwide had been educated on the operation of the system. They produced 600 product-quality wafers with 17,000 RAM-II FET reminiscence chips.
However like his WWII commander, Common Patton, Harding was bypassed to steer “the massive present”—in Harding’s case, the creation of the brand new FMS automated line. Leaving the administration profession ladder behind, he was promoted to IBM Fellow, the best nonmanagement stage within the firm.
The FMS Feasibility Line, initially SWIFT, made its final steady run in early 1975. It had completed its goals. Its individuals had been now wanted to assist create the FMS line to supply FS computer systems. However later in 1975, the FS mission was canceled, and FMS grew to become superfluous. A portion of the gear destined for FMS grew to become East Fishkill’s
QTAT (Fast Flip Round Time) line, a groundbreaking IBM showpiece that’s higher remembered than its obscure predecessor, Challenge SWIFT.
Though SWIFT’s life was quick, and it was by no means within the limelight, its many inventions are clearly seen in as we speak’s semiconductor fabs. Like SWIFT, these fabs are extremely automated and pc managed; have a central transport system and “Bernoulli” handlers, which exploit the circulate of air to elevate wafers with out making bodily contact; apply resist instantly after oxide or steel movie formation; use steppers for lithographic sample publicity; and make use of real-time course of management. All of those had been groundbreaking options of Challenge SWIFT 50 years in the past.
The expertise of working beneath Harding on SWIFT for 3 years was, for me, transformative. What had began with trepidation ended with admiration. I’ve come to think about Invoice Harding a real genius, in his personal means. Spurred on and supported by his distinctive administration fashion, a small group of devoted individuals achieved way over anybody initially envisioned. Greater than even we ourselves thought doable.
We consider the primary achievers in an trade because the “fathers” of the trendy embodiment of their innovations. Edison, Bell, Ford, and the Wright brothers, are generally spoken of this fashion. In that sense, William E. Harding is clearly the daddy of the trendy, automated, billion-dollar fab.
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